[PW_SID:959036] riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes#367
[PW_SID:959036] riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes#367linux-riscv-bot wants to merge 5 commits into
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…syscrg Add syscrg clock assignments for CPU, BUS, PERH, and QSPI as required by boot loader before kernel. Signed-off-by: E Shattow <e@freeshell.de> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…cycles max 100MHz Use qspi flash read-delay and spi-max-frequency settings compatible with U-Boot bootloader. Observations from testing on Pine64 Star64 hardware within U-Boot bootloader and read-delay=2 are spi-max-frequency less than 49.8MHz fails to write, corrupt data writes at 25MHz to 49.799999MHz, and valid data writes at 49.8MHz to 100MHz (not tested above 100MHz). No valid spi-max-frequency was found for 1<read-delay<=3 and corrupt data with read-delay=3. Looking around the Linux codebase it is common to see read-delay 2 cycles with spi-max-frequency 100MHz and testing confirms this to work in both U-Boot and Linux. Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
StarFive VisionFive2 and similar JH7110 boards have an eeprom compatible with Atmel 24c04. Add the node so this may be used with the at24 driver. Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
… boot loader Add bootph-pre-ram hinting to jh7110-common.dtsi: - i2c5_pins and i2c-pins subnode for connection to eeprom - eeprom node - qspi flash configuration subnode - memory node - mmc0 for eMMC - mmc1 for SD Card - uart0 for serial console With this the U-Boot SPL secondary program loader may drop such overrides. Signed-off-by: E Shattow <e@freeshell.de> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 1: "[v3,1/4] riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 2: "[v3,2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 3: "[v3,3/4] riscv: dts: starfive: jh7110-common: add eeprom node to i2c5" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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Patch 4: "[v3,4/4] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader" |
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PR for series 959036 applied to workflow__riscv__fixes
Name: riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=959036
Version: 3