[PW_SID:959036] riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes#367

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Commits on Apr 30, 2025

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Commits on May 2, 2025

riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg

E Shattow
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Linux RISC-V bot
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riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz

E Shattow
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Linux RISC-V bot
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riscv: dts: starfive: jh7110-common: add eeprom node to i2c5

E Shattow
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riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader

E Shattow
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