[PW_SID:967884] add Voyager board support by linux-riscv-bot · Pull Request #461 · linux-riscv/linux

linux-riscv-bot · 2025-06-02T06:25:54Z

PR for series 967884 applied to workflow__riscv__fixes

Name: add Voyager board support
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=967884
Version: 5

The first SoC in the Andes series is QiLai. It includes a high-performance quad-core RISC-V AX45MP cluster and one NX27V vector processor. For further information, refer to [1]. [1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/ Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Add DT binding documentation for the Andes QiLai SoC and the Voyager development board. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Add a new compatible string for Andes QiLai PLIC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

…nterrupt controller Add the DT binding documentation for Andes machine-level software interrupt controller. In the Andes platform such as QiLai SoC, the PLIC module is instantiated a second time with all interrupt sources tied to zero as the software interrupt controller (PLICSW). PLICSW can generate machine-level software interrupts through programming its registers. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Add the DT binding documentation for Andes machine timer. The RISC-V architecture defines a machine timer that provides a real-time counter and generates timer interrupts. Andes machiner timer (PLMT0) is the implementation of the machine timer, and it contains memory-mapped registers (mtime and mtimecmp). This device supports up to 32 cores. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Introduce the initial device tree support for the Andes QiLai SoC. For further information, you can refer to [1]. [1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/ Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Introduce the device tree support for Voyager development board. Currently only support booting into console with only uart, other features will be added later. Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

Enable Andes SoC config in defconfig to allow the default upstream kernel to boot on Voyager board. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

linux-riscv-bot · 2025-06-02T06:31:29Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 106.55 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T06:47:20Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 949.86 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:07:44Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1222.80 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:08:07Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.98 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:08:30Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.88 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:08:33Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.81 seconds
Result: WARNING
Output:

WARNING: please write a help paragraph that fully describes the config symbol with at least 4 lines
#40: FILE: arch/riscv/Kconfig.socs:3:
+config ARCH_ANDES
+	bool "Andes SoCs"
+	depends on MMU && !XIP_KERNEL
+	select ERRATA_ANDES
+	select ERRATA_ANDES_CMO
+	select AX45MP_L2_CACHE
+	help
+	  This enables support for Andes SoC platform hardware.
+

total: 0 errors, 1 warnings, 0 checks, 22 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit 2b1da3d5cf33 ("riscv: add Andes SoC family Kconfig support") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 1 warnings, 0 checks, 22 lines checked
WARNING: please write a help paragraph that fully describes the config symbol with at least 4 lines

linux-riscv-bot · 2025-06-02T07:09:41Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 67.15 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:09:43Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:09:45Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
kdoc
Desc: Detects for kdoc errors
Duration: 0.86 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:09:48Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
module-param
Desc: Detect module_param changes
Duration: 1.66 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:09:50Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.60 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:09:52Z

Patch 1: "[v5,1/8] riscv: add Andes SoC family Kconfig support"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.30 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:11:53Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 105.07 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:26:40Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 885.73 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:45:41Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1139.42 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:46:03Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.84 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:46:26Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.87 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:46:29Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.03 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:47:40Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 69.55 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:47:41Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:47:44Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
kdoc
Desc: Detects for kdoc errors
Duration: 0.98 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T07:47:45Z

Patch 2: "[v5,2/8] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings"
module-param
Desc: Detect module_param changes
Duration: 0.31 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:19:55Z

Patch 6: "[v5,6/8] riscv: dts: andes: add QiLai SoC device tree"
kdoc
Desc: Detects for kdoc errors
Duration: 0.96 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:19:57Z

Patch 6: "[v5,6/8] riscv: dts: andes: add QiLai SoC device tree"
module-param
Desc: Detect module_param changes
Duration: 0.32 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:19:58Z

Patch 6: "[v5,6/8] riscv: dts: andes: add QiLai SoC device tree"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:20:01Z

Patch 6: "[v5,6/8] riscv: dts: andes: add QiLai SoC device tree"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:22:02Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 105.81 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:37:40Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 936.92 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:57:48Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1205.90 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:58:10Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.86 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:58:33Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.92 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:58:37Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 2.35 seconds
Result: WARNING
Output:

WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 36 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit c3909f8a8a1f ("riscv: dts: andes: add Voyager board device tree") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 1 warnings, 0 checks, 36 lines checked
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?

linux-riscv-bot · 2025-06-02T10:59:49Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 71.19 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:59:51Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.24 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:59:53Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
kdoc
Desc: Detects for kdoc errors
Duration: 0.93 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:59:55Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
module-param
Desc: Detect module_param changes
Duration: 0.34 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:59:57Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T10:59:58Z

Patch 7: "[v5,7/8] riscv: dts: andes: add Voyager board device tree"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.31 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:02:01Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 106.72 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:16:50Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 887.43 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:35:55Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1143.48 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:36:17Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.76 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:36:41Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.99 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:36:43Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.66 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:37:56Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 71.87 seconds
Result: ERROR
Output:

Redirect to /build/tmp.d3kdRFvZqA and /build/tmp.JIplZhvmii
Tree base:
c3909f8a8a1fb ("riscv: dts: andes: add Voyager board device tree")
Building the tree before the patch
make: Entering directory '/build/tmpdz6h8smh'
make[1]: Entering directory '/build/tmp.YBtxCWziih'
  GEN     Makefile
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/kconfig/conf.o
  HOSTCC  scripts/kconfig/confdata.o
  HOSTCC  scripts/kconfig/expr.o
  LEX     scripts/kconfig/lexer.lex.c
  YACC    scripts/kconfig/parser.tab.[ch]
  HOSTCC  scripts/kconfig/lexer.lex.o
  HOSTCC  scripts/kconfig/menu.o
  HOSTCC  scripts/kconfig/parser.tab.o
  HOSTCC  scripts/kconfig/preprocess.o
  HOSTCC  scripts/kconfig/symbol.o
  HOSTCC  scripts/kconfig/util.o
  HOSTLD  scripts/kconfig/conf
*** Default configuration is based on 'defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/build/tmp.YBtxCWziih'
make: Leaving directory '/build/tmpdz6h8smh'
make: Entering directory '/build/tmpdz6h8smh'
make[1]: Entering directory '/build/tmp.YBtxCWziih'
  HOSTCC  scripts/dtc/dtc.o
  HOSTCC  scripts/dtc/flattree.o
  HOSTCC  scripts/dtc/fstree.o
  HOSTCC  scripts/dtc/data.o
  HOSTCC  scripts/dtc/livetree.o
  HOSTCC  scripts/dtc/treesource.o
  HOSTCC  scripts/dtc/srcpos.o
  HOSTCC  scripts/dtc/checks.o
  HOSTCC  scripts/dtc/util.o
  LEX     scripts/dtc/dtc-lexer.lex.c
  YACC    scripts/dtc/dtc-parser.tab.[ch]
  HOSTCC  scripts/dtc/libfdt/fdt.o
  HOSTCC  scripts/dtc/libfdt/fdt_ro.o
  HOSTCC  scripts/dtc/libfdt/fdt_wip.o
  HOSTCC  scripts/dtc/libfdt/fdt_sw.o
  HOSTCC  scripts/dtc/libfdt/fdt_rw.o
  HOSTCC  scripts/dtc/libfdt/fdt_strerror.o
  HOSTCC  scripts/dtc/libfdt/fdt_empty_tree.o
  HOSTCC  scripts/dtc/libfdt/fdt_addresses.o
  HOSTCC  scripts/dtc/libfdt/fdt_overlay.o
  HOSTCC  scripts/dtc/fdtoverlay.o
  HOSTCC  scripts/dtc/dtc-lexer.lex.o
  HOSTCC  scripts/dtc/dtc-parser.tab.o
  UPD     include/config/kernel.release
  HOSTLD  scripts/dtc/fdtoverlay
  SCHEMA  Documentation/devicetree/bindings/processed-schema.json
  HOSTLD  scripts/dtc/dtc
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb
  DTC [C] arch/riscv/boot/dts/canaan/canaan_kd233.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dtb
  DTC [C] arch/riscv/boot/dts/canaan/k210_generic.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb
  DTC [C] arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maix_bit.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dtb
  DTC [C] arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maix_dock.dtb
  DTC [C] arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dtb
  DTC [C] arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maix_go.dtb
  DTC [C] arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-mangopi-mq-pro.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dtb
  DTC [C] arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maixduino.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1s-mangopi-mq.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb
make[1]: Leaving directory '/build/tmp.YBtxCWziih'
make: Leaving directory '/build/tmpdz6h8smh'
Building the tree with the patch
make: Entering directory '/build/tmpdz6h8smh'
make[1]: Entering directory '/build/tmp.cuBeYdiii4'
  GEN     Makefile
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/kconfig/conf.o
  HOSTCC  scripts/kconfig/confdata.o
  HOSTCC  scripts/kconfig/expr.o
  LEX     scripts/kconfig/lexer.lex.c
  YACC    scripts/kconfig/parser.tab.[ch]
  HOSTCC  scripts/kconfig/lexer.lex.o
  HOSTCC  scripts/kconfig/menu.o
  HOSTCC  scripts/kconfig/parser.tab.o
  HOSTCC  scripts/kconfig/preprocess.o
  HOSTCC  scripts/kconfig/symbol.o
  HOSTCC  scripts/kconfig/util.o
  HOSTLD  scripts/kconfig/conf
*** Default configuration is based on 'defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/build/tmp.cuBeYdiii4'
make: Leaving directory '/build/tmpdz6h8smh'
make: Entering directory '/build/tmpdz6h8smh'
make[1]: Entering directory '/build/tmp.cuBeYdiii4'
  HOSTCC  scripts/dtc/dtc.o
  HOSTCC  scripts/dtc/flattree.o
  HOSTCC  scripts/dtc/fstree.o
  HOSTCC  scripts/dtc/data.o
  HOSTCC  scripts/dtc/livetree.o
  HOSTCC  scripts/dtc/treesource.o
  HOSTCC  scripts/dtc/srcpos.o
  HOSTCC  scripts/dtc/checks.o
  HOSTCC  scripts/dtc/util.o
  LEX     scripts/dtc/dtc-lexer.lex.c
  YACC    scripts/dtc/dtc-parser.tab.[ch]
  HOSTCC  scripts/dtc/libfdt/fdt.o
  HOSTCC  scripts/dtc/libfdt/fdt_ro.o
  HOSTCC  scripts/dtc/libfdt/fdt_wip.o
  HOSTCC  scripts/dtc/libfdt/fdt_sw.o
  HOSTCC  scripts/dtc/libfdt/fdt_rw.o
  HOSTCC  scripts/dtc/libfdt/fdt_strerror.o
  HOSTCC  scripts/dtc/libfdt/fdt_empty_tree.o
  HOSTCC  scripts/dtc/libfdt/fdt_addresses.o
  HOSTCC  scripts/dtc/libfdt/fdt_overlay.o
  HOSTCC  scripts/dtc/fdtoverlay.o
  HOSTCC  scripts/dtc/dtc-lexer.lex.o
  HOSTCC  scripts/dtc/dtc-parser.tab.o
  UPD     include/config/kernel.release
  HOSTLD  scripts/dtc/fdtoverlay
  SCHEMA  Documentation/devicetree/bindings/processed-schema.json
  HOSTLD  scripts/dtc/dtc
  DTC [C] arch/riscv/boot/dts/andes/qilai-voyager.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dtb
  DTC [C] arch/riscv/boot/dts/canaan/canaan_kd233.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb
  DTC [C] arch/riscv/boot/dts/canaan/k210_generic.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maix_bit.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dtb
  DTC [C] arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dtb
  DTC [C] arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dtb
  DTC [C] arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maix_dock.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dtb
  DTC [C] arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maix_go.dtb
  DTC [C] arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb
  DTC [C] arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb
  DTC [C] arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dtb
  DTC [C] arch/riscv/boot/dts/canaan/sipeed_maixduino.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb
  DTC [C] arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-mangopi-mq-pro.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb
  DTC [C] arch/riscv/boot/dts/allwinner/sun20i-d1s-mangopi-mq.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb
  DTC [C] arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb
/build/tmp.cuBeYdiii4/arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: compatible:0: 'andestech,ax45mp-cache' was expected
	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
/build/tmp.cuBeYdiii4/arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: compatible:1: 'cache' was expected
	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
/build/tmp.cuBeYdiii4/arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: compatible: ['andestech,qilai-ax45mp-cache', 'andestech,ax45mp-cache', 'cache'] is too long
	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
/build/tmp.cuBeYdiii4/arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: cache-sets: 1024 was expected
	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
arch/riscv/boot/dts/andes/qilai-voyager.dtb: /soc/cache-controller@200000: failed to match any schema with compatible: ['andestech,qilai-ax45mp-cache', 'andestech,ax45mp-cache', 'cache']
make[1]: Leaving directory '/build/tmp.cuBeYdiii4'
make: Leaving directory '/build/tmpdz6h8smh'
Errors and warnings before: 0 this patch: 9
New errors added
--- /build/tmp.d3kdRFvZqA	2025-06-02 11:37:53.409361573 +0000
+++ /build/tmp.JIplZhvmii	2025-06-02 11:37:53.411361560 +0000
@@ -0,0 +1,9 @@
+arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: compatible:0: 'andestech,ax45mp-cache' was expected
+	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
+arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: compatible:1: 'cache' was expected
+	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
+arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: compatible: ['andestech,qilai-ax45mp-cache', 'andestech,ax45mp-cache', 'cache'] is too long
+	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
+arch/riscv/boot/dts/andes/qilai-voyager.dtb: cache-controller@200000: cache-sets: 1024 was expected
+	from schema $id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
+arch/riscv/boot/dts/andes/qilai-voyager.dtb: /soc/cache-controller@200000: failed to match any schema with compatible: ['andestech,qilai-ax45mp-cache', 'andestech,ax45mp-cache', 'cache']

linux-riscv-bot · 2025-06-02T11:37:58Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:38:00Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
kdoc
Desc: Detects for kdoc errors
Duration: 0.90 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:38:02Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:38:04Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2025-06-02T11:38:05Z

Patch 8: "[v5,8/8] riscv: defconfig: enable Andes SoC"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.31 seconds
Result: PASS

ben717-linux added 8 commits June 2, 2025 06:25

dt-bindings: interrupt-controller: add Andes QiLai PLIC

a34d18d

Add a new compatible string for Andes QiLai PLIC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

linux-riscv-bot closed this Jun 10, 2025

linux-riscv-bot deleted the pw967884 branch June 10, 2025 01:06

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