Skip to content

[PW_SID:969274] riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110#480

Closed
linux-riscv-bot wants to merge 4 commits into
workflow__riscv__fixesfrom
pw969274
Closed

[PW_SID:969274] riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110#480
linux-riscv-bot wants to merge 4 commits into
workflow__riscv__fixesfrom
pw969274

Conversation

@linux-riscv-bot
Copy link
Copy Markdown

@linux-riscv-bot linux-riscv-bot commented Jun 6, 2025

PR for series 969274 applied to workflow__riscv__fixes

Name: riscv: dts: starfive: jh7110: More U-Boot downstream changes for JH7110
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=969274
Version: 1

Linux RISC-V bot and others added 4 commits May 14, 2025 13:11
Adding CI files
400e3f8
dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
036bffb 
Document bindings for the JH7110 SoC DMC as implemented in downstream
U-Boot driver starfive_ddr.c

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
riscv: dts: starfive: jh7110: add memory controller node
1528a77 
add memory controller node used downstream by U-Boot boot loader.

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot l…
18b61c0 
…oader

Add bootph-pre-ram hinting to jh7110.dtsi:
  - CPU interrupt controller(s)
  - core local interrupt timer
  - DDR memory controller
  - oscillator
  - syscrg clock-controller

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 105.59 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 878.02 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1145.04 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.56 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.47 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.67 seconds
Result: WARNING
Output:

WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#17: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 76 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit 036bffb0df32 ("dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 1 warnings, 0 checks, 76 lines checked
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 67.11 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
kdoc
Desc: Detects for kdoc errors
Duration: 0.89 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v1,1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.30 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 104.41 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 929.13 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1203.74 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.63 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.86 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.76 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 67.92 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.50 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
kdoc
Desc: Detects for kdoc errors
Duration: 0.89 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 2: "[v1,2/3] riscv: dts: starfive: jh7110: add memory controller node"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.30 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 105.81 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 925.02 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1202.56 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.84 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.96 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.68 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 66.84 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.24 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
kdoc
Desc: Detects for kdoc errors
Duration: 0.87 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
module-param
Desc: Detect module_param changes
Duration: 0.26 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

linux-riscv-bot commented Jun 6, 2025

Patch 3: "[v1,3/3] riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.30 seconds
Result: PASS

@linux-riscv-bot linux-riscv-bot force-pushed the workflow__riscv__fixes branch from 400e3f8 to 948b274 Compare June 10, 2025 15:48
@linux-riscv-bot linux-riscv-bot deleted the pw969274 branch June 10, 2025 17:18
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

No reviews

Assignees

No one assigned

Labels

None yet

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

1 participant

@linux-riscv-bot