[PW_SID:973967] RISC-V: turn sbi_ecall into a variadic macro#554
[PW_SID:973967] RISC-V: turn sbi_ecall into a variadic macro#554linux-riscv-bot wants to merge 4 commits into
Conversation
The SBI ecall interface has 0~6 arguments in a0~a5, and undefined arguments are not reserved, so we don't have to zero the registers. The current sbi_ecall forces programmers to pad the argument count, which makes it hard to distinguish what is a value 0, and what is the padding, because 0 was traditionally used for padding as well. Turn sbi_ecall into a variadic macro that accepts 2~8 arguments, and where only the specified arguments get passed to the ecall instruction. The register a1 is zeroed if unused, to prevent unnecessary leaks of kernel register state from the tracepoints. Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The new sbi_ecall doesn't have to list all 8 arguments anymore, so only pass the actual numbers of arguments for each SBI function. The remaining trailing 0 are intentional as they represent an argument. SBI 0.1 shouldn't be using the sbi_ecall, because it's only for 0.2+, but allow it by passing 0 is the reserved register. Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Tracepoits generate bad code in the non-trace path. The acceptable tracepoint overhead in the non-tracing path is a nop, and possibly a second 2 byte nop for alignment, but the actual overhead is way higher. For example, the sbi_fwft_set with tracepoints: 0xffffffff80022ee8 <+0>: auipc a5,0x2cec 0xffffffff80022eec <+4>: lbu a5,1704(a5) # 0xffffffff82d0f590 <sbi_fwft_supported> 0xffffffff80022ef0 <+8>: beqz a5,0xffffffff80022fa0 <sbi_fwft_set+184> 0xffffffff80022ef2 <+10>: addi sp,sp,-48 0xffffffff80022ef4 <+12>: sd s0,32(sp) 0xffffffff80022ef6 <+14>: sd s1,24(sp) 0xffffffff80022ef8 <+16>: sd s2,16(sp) 0xffffffff80022efa <+18>: sd ra,40(sp) 0xffffffff80022efc <+20>: addi s0,sp,48 0xffffffff80022efe <+22>: slli s1,a0,0x20 0xffffffff80022f02 <+26>: mv s2,a1 0xffffffff80022f04 <+28>: srli s1,s1,0x20 0xffffffff80022f06 <+30>: nop 0xffffffff80022f08 <+32>: nop 0xffffffff80022f0c <+36>: lui a7,0x46574 0xffffffff80022f10 <+40>: mv a0,s1 0xffffffff80022f12 <+42>: mv a1,s2 0xffffffff80022f14 <+44>: addi a7,a7,1620 # 0x46574654 0xffffffff80022f18 <+48>: li a6,0 0xffffffff80022f1a <+50>: ecall 0xffffffff80022f1e <+54>: mv s1,a0 0xffffffff80022f20 <+56>: nop 0xffffffff80022f24 <+60>: addiw a0,s1,14 0xffffffff80022f28 <+64>: li a5,14 0xffffffff80022f2a <+66>: bltu a5,a0,0xffffffff80022f9a <sbi_fwft_set+178> 0xffffffff80022f2e <+70>: slli a5,a0,0x20 0xffffffff80022f32 <+74>: srli a0,a5,0x1e 0xffffffff80022f36 <+78>: auipc a5,0x1c75 0xffffffff80022f3a <+82>: addi a5,a5,-886 # 0xffffffff81c97bc0 <CSWTCH.177> 0xffffffff80022f3e <+86>: add a5,a5,a0 0xffffffff80022f40 <+88>: lw a0,0(a5) 0xffffffff80022f42 <+90>: ld ra,40(sp) 0xffffffff80022f44 <+92>: ld s0,32(sp) 0xffffffff80022f46 <+94>: ld s1,24(sp) 0xffffffff80022f48 <+96>: ld s2,16(sp) 0xffffffff80022f4a <+98>: addi sp,sp,48 0xffffffff80022f4c <+100>: ret [tracepoint slowpaths] 0xffffffff80022f9a <+178>: li a0,-524 0xffffffff80022f9e <+182>: j 0xffffffff80022f42 <sbi_fwft_set+90> 0xffffffff80022fa0 <+184>: li a0,-95 0xffffffff80022fa4 <+188>: ret Without tracepoints: 0xffffffff80022b40 <+0>: addi sp,sp,-16 0xffffffff80022b42 <+2>: sd s0,0(sp) 0xffffffff80022b44 <+4>: sd ra,8(sp) 0xffffffff80022b46 <+6>: addi s0,sp,16 0xffffffff80022b48 <+8>: auipc a5,0x2ced 0xffffffff80022b4c <+12>: lbu a5,-1464(a5) # 0xffffffff82d0f590 <sbi_fwft_supported> 0xffffffff80022b50 <+16>: beqz a5,0xffffffff80022b8e <sbi_fwft_set+78> 0xffffffff80022b52 <+18>: lui a7,0x46574 0xffffffff80022b56 <+22>: slli a0,a0,0x20 0xffffffff80022b58 <+24>: srli a0,a0,0x20 0xffffffff80022b5a <+26>: addi a7,a7,1620 # 0x46574654 0xffffffff80022b5e <+30>: li a6,0 0xffffffff80022b60 <+32>: ecall 0xffffffff80022b64 <+36>: li a5,14 0xffffffff80022b66 <+38>: addiw a0,a0,14 0xffffffff80022b68 <+40>: bltu a5,a0,0xffffffff80022b88 <sbi_fwft_set+72> 0xffffffff80022b6c <+44>: slli a5,a0,0x20 0xffffffff80022b70 <+48>: srli a0,a5,0x1e 0xffffffff80022b74 <+52>: auipc a5,0x1c75 0xffffffff80022b78 <+56>: addi a5,a5,-300 # 0xffffffff81c97a48 <CSWTCH.176> 0xffffffff80022b7c <+60>: add a5,a5,a0 0xffffffff80022b7e <+62>: lw a0,0(a5) 0xffffffff80022b80 <+64>: ld ra,8(sp) 0xffffffff80022b82 <+66>: ld s0,0(sp) 0xffffffff80022b84 <+68>: addi sp,sp,16 0xffffffff80022b86 <+70>: ret 0xffffffff80022b88 <+72>: li a0,-524 0xffffffff80022b8c <+76>: j 0xffffffff80022b80 <sbi_fwft_set+64> 0xffffffff80022b8e <+78>: li a0,-95 0xffffffff80022b92 <+82>: j 0xffffffff80022b80 <sbi_fwft_set+64> It would be nice if RISC-V had a way to tell compilers to generate the desired code, because if this issue isn't limited to ecall tracepoints, then disabling CONFIG_TRACEPOINTS is starting to look good. :) Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 1: "[v2,1/2] RISC-V: sbi: turn sbi_ecall into variadic macro" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 2: "[v2,2/2] RISC-V: make use of variadic sbi_ecall" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
|
Patch 3: "[v2,3/2] RISC-V: sbi: remove sbi_ecall tracepoints" |
6ce2eef to
b5ded79
Compare
PR for series 973967 applied to workflow__riscv__fixes
Name: RISC-V: turn sbi_ecall into a variadic macro
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=973967
Version: 2